wafer

Double-Side Polishing Fused Silica Wafers

Double-Side Polishing Fused Silica Wafers: Fused Silica, CTE 0.55 x 10^-6 /K; TTV under 3 um. No MOQ, prototypes in 5-10 days, DFM review with every RFQ.

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Double-Side Polishing Fused Silica Wafers: Fused Silica (CTE 0.55 x 10^-6 /K, 185 nm – 2.5 um); Double-Side Polishing to TTV under 3 um. Single-piece prototypes to production volumes, quoted from your drawing.

The combination of Fused Silica and Double-Side Polishing comes up constantly in RFQs for a reason – the material offers deep-uv transmission, and Double-Side Polishing is the right way to get accurate geometry into it. Expect TTV under 3 um and 60/40 to 20/10 both faces.

The numbers

Material Fused Silica (JGS1 (UV), JGS2 (standard), JGS3 (IR))
Thermal expansion (CTE) 0.55 x 10^-6 /K
Service temperature 1,100 C continuous
Transmission range 185 nm – 2.5 um
Density 2.20 g/cm3
Knoop hardness 500 kg/mm2
Refractive index 1.458 @ 587 nm
Stock thickness 0.10 – 50 mm
Maximum blank size 450 x 450 mm
Process Double-Side Polishing
Working tolerance TTV under 3 um
Minimum feature Ra below 0.5 nm both faces
Surface finish 60/40 to 20/10 both faces
Thickness window 0.1 – 10 mm
Edge condition edge-rounded before DSP
Wafer formats 2", 3", 4", 6", 8" and 12" with SEMI flats or notch
TTV under 3 – 5 um by format
RFQ inputs PDF/DXF/STEP drawing, quantity brackets, surface and edge spec

Getting the drawing right

The shop-floor rules that matter here:

  • Material note: its hardness and brittleness demand diamond tooling and controlled feeds.
  • Process boundary: parts must be round or near-round; strongly asymmetric outlines wedge in the carriers.
  • Over-specification is the quiet budget killer: a 20/10 scratch-dig face costs roughly three times an 80/50 face, so grade each surface individually.

For the complete framework, see the tolerance design guide and the holes and edges design guide.

What the process holds

Double-Side Polishing earns its place through wafer-grade parallelism and sub-nanometer roughness on both faces simultaneously. Its boundary condition – parts must be round or near-round; strongly asymmetric outlines wedge in the carriers – is the first thing our DFM review checks.

Beyond this page, Fused Silica routinely runs through ultrasonic machining, cnc machining, drilling, edge grinding in our shop – most real parts combine two or three of these steps.

Application context

The recurring buyers of double-side polishing fused silica wafers: machine vision (camera windows, ring-light diffusers, calibration plates); medical diagnostics (flow cells, slides, microplate bottoms, cuvette windows); laboratory instruments (cuvettes, sight glasses, stir-cell windows). Background reading on the underlying material science: RP Photonics: fused silica.

The fastest route to a quote is geometry: use the 3D builder below, draw a dimensioned 2D drawing from it, or open the site-wide custom glass machining 3D + 2D builder for fully custom parts.

Related reading on this site: wafer dicing process, fused silica wafer applications, CCD screening plates.

Common questions

What equipment runs the double-side polishing work?

Planetary double-side polishers with carrier plates.

Is there a minimum order for double-side polishing fused silica wafers?

No. Single prototypes are accepted, and pricing steps down at 10, 100 and 1,000 pieces.

How fast can prototypes ship?

Machined prototypes ship in 5 – 10 working days. Coated or bonded parts add 1 – 2 weeks depending on queue slots.

What files do you need for a quote?

A dimensioned PDF plus DXF or STEP geometry. If only a sketch exists, our drawing review service formalizes it before quoting.

Do parts ship with inspection data?

Dimensional reports, surface certificates and material certs per melt are available; specify the level on the RFQ.

Specifications on this page were last reviewed by our engineering team in September 2026.

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3D Model & 2D Drawing Builder

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Engineering Review

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